A Flexible Chip Multiprocessor Simulator Dedicated for Thread Level Speculation

WangYaobinAnHongLiuZhiqinLiLing

高性能计算与并行算法方向论文：A Flexible Chip Multiprocessor Simulator Dedicated for Thread Level Spec

↗在线页面Official page ◇DOI

内容导读Reading note

分类与摘要Category & abstract

关注大规模并行算法、超算平台和性能优化，是 HPC 方向的重要条目。

Metadata

完整论文信息Full record

title: A Flexible Chip Multiprocessor Simulator Dedicated for Thread Level Speculation
title_zh: 待补充
abstract: 待补充
abstract_zh: 待补充
keywords: HPC, Architecture, Distributed, CCF C
year: 2016
published_date: 待补充
online_date: 待补充
paper_type: Conference
publication_status: Published
volume: 待补充
issue: 待补充
pages: 待补充
article_number: 待补充
publisher: IEEE
doi: 10.1109/trustcom.2016.0327
research_area: 高性能计算与并行算法
tags: HPC, Architecture, Distributed, CCF C
category: 高性能计算与并行算法
summary: 关注大规模并行算法、超算平台和性能优化，是 HPC 方向的重要条目。
authors: Wang, Yaobin, An, Hong, Liu, Zhiqin, Li, Ling
corresponding_authors: 安虹
affiliations: 待补充
funding: 待补充

Research area

高性能计算与并行算法

Citation

Wang, Yaobin; An, Hong; Liu, Zhiqin; Li, Ling; Huang, Jun， A flexible chip multiprocessor simulator dedicated for thread level speculation，In: Proceedings of the 14th IEEE International Symposium on Parallel and Distributed Processing with Applications(ISPA 2016), Tianjin, China, August 23-26, 2016

BibTeX

@article{acsa2016_108,
  title = {A Flexible Chip Multiprocessor Simulator Dedicated for Thread Level Speculation},
  year = {2016},
  doi = {10.1109/trustcom.2016.0327}
}