Exploiting Speculative Thread-Level Parallelism Based on Transactional Memory

WangYaobinAnHongLiuYuanDongWanli

高性能计算与并行算法方向论文：Exploiting Speculative Thread-Level Parallelism Based on Transactional M

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内容导读Reading note

分类与摘要Category & abstract

关注大规模并行算法、超算平台和性能优化，是 HPC 方向的重要条目。

Metadata

完整论文信息Full record

title: Exploiting Speculative Thread-Level Parallelism Based on Transactional Memory
title_zh: 待补充
abstract: 待补充
abstract_zh: 待补充
keywords: HPC
year: 2011
published_date: 待补充
online_date: 待补充
paper_type: Conference
publication_status: Published
volume: 待补充
issue: 待补充
pages: 待补充
article_number: 待补充
publisher: 待补充
doi: 10.1109/cmc.2011.43
research_area: 高性能计算与并行算法
tags: HPC
category: 高性能计算与并行算法
summary: 关注大规模并行算法、超算平台和性能优化，是 HPC 方向的重要条目。
authors: Wang, Yaobin, An, Hong, Liu, Yuan, Dong, Wanli
corresponding_authors: 安虹
affiliations: 待补充
funding: 待补充

Research area

高性能计算与并行算法

Citation

Wang, Yaobin; An, Hong; Liu, Yuan; Dong, Wanli; Xu, Kang, Exploiting speculative thread-level parallelism based on transactional memory, In: Proceedings of the 2011 3rd International Conference on Communications and Mobile Computing, CMC 2011, Qingdao，p 137-140, 18-20 April 2011

BibTeX

@article{acsa2011_146,
  title = {Exploiting Speculative Thread-Level Parallelism Based on Transactional Memory},
  year = {2011},
  doi = {10.1109/cmc.2011.43}
}