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The optimization of parallel Smith-Waterman sequence alignment using on-chip memory of GPGPU cover

2010Conference

高性能计算与并行算法Published

The optimization of parallel Smith-Waterman sequence alignment using on-chip memory of GPGPU

Qian ZhangHong AnGu LiuWenting HanPing YaoMu XuXiaoqiang LiThe Optimization of Parallel Smith-Waterman Sequence Alignment Using On-chip Memory of GPGPU
高性能计算与并行算法方向论文:The optimization of parallel Smith-Waterman sequence alignment using on-

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分类与摘要Category & abstract

关注大规模并行算法、超算平台和性能优化,是 HPC 方向的重要条目。

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title
The optimization of parallel Smith-Waterman sequence alignment using on-chip memory of GPGPU
title_zh
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abstract
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abstract_zh
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keywords
GPU, HPC
year
2010
published_date
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online_date
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paper_type
Conference
publication_status
Published
volume
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issue
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pages
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article_number
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publisher
IEEE
doi
10.1109/bicta.2010.5645235
research_area
高性能计算与并行算法
tags
GPU, HPC
category
高性能计算与并行算法
summary
关注大规模并行算法、超算平台和性能优化,是 HPC 方向的重要条目。
authors
Qian Zhang, Hong An, Gu Liu, Wenting Han, Ping Yao, Mu Xu, Xiaoqiang Li, The Optimization of Parallel Smith-Waterman Sequence Alignment Using On-chip Memory of GPGPU
corresponding_authors
安虹
affiliations
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funding
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